Robot model
GroqChip LPU
Deterministic low-latency AI inference processor. 750 TOPS at INT8, 80W TDP.
GroqChip LPU is a compute robot built by · Documented in 4 deployments across Europe, North America, Global, and Mountain View.
Machine-readable surfaces
- Markdown mirror: /models/groq-chip.md
- JSON-LD: embedded in this page’s head
- REST API: /v1/models/a7c4d6ab-61b3-4f58-984e-4532654ed127
- Revision history: /models/groq-chip/history
- Data documentation: /data
- Query this programmatically: Deploy MCP
- Form factor
- compute
- Lifecycle
- active
- Deployments
- 4
- ID
a7c4d6ab-61b3-4f58-984e-4532654ed127
Deploy Watch
Track GroqChip LPU on Deploy.
We notify you when pricing, deployment status, or regulatory state changes against primary-source evidence, not when the maker issues claims.
Recent deployments (4)
- GroqChip LPU at EuropeEurope
- GroqChip LPU at North AmericaNorth America
- GroqChip LPU at GlobalGlobal
- GroqChip LPU at Mountain ViewMountain View
Sources (1)
Common questions
- What is GroqChip LPU?
- Deterministic low-latency AI inference processor. 750 TOPS at INT8, 80W TDP.
- Who makes GroqChip LPU?
- GroqChip LPU is made by Groq, based in Mountain View, CA.
- Where is GroqChip LPU deployed?
- 4 verified deployments of GroqChip LPU are on the DEPLOY registry, including at Europe, North America, Global.
Methodology: Verified · 1 source (no primary) · last reviewed 2026-06-07
Verification posture
Verified
Low confidence
Review state
Stable
Last reviewed 2026-06-07
Maturity + lifecycle
Lifecycle: active
Architectural position
Cohort: compute
Sources by quality tier
- 1
- unclassified
- Unclassified source
The framework is documented at /methodology. Corrections at /corrections. Reviewer: DEPLOY editorial team.
Methodology surface for GroqChip LPU.