DEPLOYDatabase

AI chip · Intel Corporation

Intel Gaudi 3

Third-generation Habana-designed AI accelerator, positioned as the mainline Intel alternative to Nvidia H100 for training + inference.

Market position

Intel's third-generation Gaudi. 4x Gaudi 2 BF16. Positioned as the price/performance NVIDIA alternative through IBM Cloud, Dell, and Supermicro. Intel is winding down the Habana line in favour of the Falcon Shores unified GPU roadmap; Gaudi 3 is the last standalone Habana chip.

DEPLOY editorial. What the vendor PDF cannot tell you.

Physical-AI cross-link

Derived from claims already on record (vendor first-party TDP, throughput, price, and the reference-design cluster registry). The arithmetic is shown per row so it can be audited. No estimated inputs.

Perf per watt
2.04 FP8 TFLOPS/W
1,835 TFLOPS ÷ 900 W = 2.04

What fits in 128 GB

Weights-only footprint for public open-weight LLMs. Pure arithmetic: params × bytes/param. Excludes KV cache and activation memory; add ~10-30% headroom for real serving. A model that does not fit at FP16 may still fit at INT8 or INT4 with quality trade-offs. Not a benchmark.

ModelParamsFP16INT8INT4
Llama 3.1 8B
dense
8 B16 GB ✓8 GB ✓4 GB ✓
Llama 3.1 70B
dense
70 B140 GB ✗70 GB ✓35 GB ✓
Llama 3.1 405B
dense
405 B810 GB ✗405 GB ✗203 GB ✗
Llama 3.3 70B
dense
70 B140 GB ✗70 GB ✓35 GB ✓
DeepSeek V3
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
DeepSeek R1
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
Qwen 2.5 7B
dense
7 B14 GB ✓7 GB ✓4 GB ✓
Qwen 2.5 72B
dense
72 B144 GB ✗72 GB ✓36 GB ✓
Mixtral 8x7B
MoE (46.7B total, 12.9B active per token)
46.7 B93 GB ✓47 GB ✓23 GB ✓
Mixtral 8x22B
MoE (141B total, 39B active per token)
141 B282 GB ✗141 GB ✗71 GB ✓
Gemma 2 27B
dense
27 B54 GB ✓27 GB ✓14 GB ✓
Command R+
dense
104 B208 GB ✗104 GB ✓52 GB ✓
Kimi K2
MoE (1T total, 32B active per token)
1000 B2000 GB ✗1000 GB ✗500 GB ✗

Math: FP16 = params × 2 bytes; INT8 = params × 1 byte; INT4 = params × 0.5 bytes. MoE models sum every expert (full weights on disk), not the per-token active subset.

Common questions

Answer-first, sourced. Every claim below traces to a specific field on this page or a cited datasheet. FAQPage schema is emitted so LLM crawlers can lift these verbatim.

How much does Intel Gaudi 3 cost?

Intel Gaudi 3 launch pricing is not on record in the DEPLOY registry. Vendor list prices are typically published in the vendor's own briefing rather than the datasheet.

How much memory does Intel Gaudi 3 have?

128 GB of HBM2e at 3,675 GB/s. Vendor datasheet, first-party.

How much power does one Intel Gaudi 3 draw?

900 W TDP (thermal design power) per chip. System-level draw is higher: see the reference-design section for rack-level kW.

Which open-weight LLMs fit on one Intel Gaudi 3?

Of the 13 public open-weight LLMs DEPLOY tracks: 4 fit at FP16, 8 at INT8, 9 at INT4 (weights only, excludes KV cache). The full table is above with per-model math. Sparsity, offloading and multi-GPU serving change the picture; this row is single-chip weights-only.

Key facts

Class
Compute SoC (AI accelerator)
Safety-critical?
No (data-center inference / training)
Record as of
2026-08-25
Latest cited claim
2024-04-01 (across 1 inventory + benchmark row)
Specifications (9 fields, click to expand)

Vendor datasheet figures (first-party). Dense throughput first; sparse (2:4) in parentheses where NVIDIA quotes it. The exhaustive spec sheet lives on the datasheet URL below the table: this row set covers what buyers actually compare on.

Process node
TSMC N5
TDP
900 W
Memory
128 GB HBM2e
Memory bandwidth
3,675 GB/s
FP16 (dense)
1,835 TFLOPS
FP8 (dense)
1,835 TFLOPS
Form factor
OAM
Announced
2024-04-09
Released
2024-09-01

Source: vendor datasheet

Generation

Compare with

See every chip comparison →

Benchmarks

Published measurements per workload. Vendor datasheet numbers are first-party (verified posture); MLPerf / InferenceX / press results come in when their license terms + workload naming permit.

WorkloadValueUnitSourceAs of
peak tflops fp81835TFLOPSvendor2024-04-01

Sources

Adoption rows appear as we verify chip-integration claims per model. Every row is a public claim the maker or a tier-1 source has stated; verification tier (verified / reported / inferred) is shown per row. See every chip on record for the full catalog or the Intel Corporation record.