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AI chip · NVIDIA

NVIDIA A10 Tensor Core GPU

Ampere PCIe 150W inference GPU, 24 GB GDDR6. Successor to T4 in the mid-range inference tier.

Market position

A10 was NVIDIA's 2021 mid-range Ampere PCIe card, engineered as the mainstream data-center card between the T4 (2018) and A100 (2020). Enterprise VDI, mid-tier inference and virtual workstation fleets standardised on it because it fit a 150 W single-slot budget the A100 could not touch. L4 (2023) succeeded it on inference workloads; L40S (2023) is where high-end PCIe went next.

DEPLOY editorial. What the vendor PDF cannot tell you.

Physical-AI cross-link

Derived from claims already on record (vendor first-party TDP, throughput, price, and the reference-design cluster registry). The arithmetic is shown per row so it can be audited. No estimated inputs.

Perf per watt
0.83 FP16 TFLOPS/W
125 TFLOPS ÷ 150 W = 0.83

What fits in 24 GB

Weights-only footprint for public open-weight LLMs. Pure arithmetic: params × bytes/param. Excludes KV cache and activation memory; add ~10-30% headroom for real serving. A model that does not fit at FP16 may still fit at INT8 or INT4 with quality trade-offs. Not a benchmark.

ModelParamsFP16INT8INT4
Llama 3.1 8B
dense
8 B16 GB ✓8 GB ✓4 GB ✓
Llama 3.1 70B
dense
70 B140 GB ✗70 GB ✗35 GB ✗
Llama 3.1 405B
dense
405 B810 GB ✗405 GB ✗203 GB ✗
Llama 3.3 70B
dense
70 B140 GB ✗70 GB ✗35 GB ✗
DeepSeek V3
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
DeepSeek R1
MoE (671B total, 37B active per token)
671 B1342 GB ✗671 GB ✗336 GB ✗
Qwen 2.5 7B
dense
7 B14 GB ✓7 GB ✓4 GB ✓
Qwen 2.5 72B
dense
72 B144 GB ✗72 GB ✗36 GB ✗
Mixtral 8x7B
MoE (46.7B total, 12.9B active per token)
46.7 B93 GB ✗47 GB ✗23 GB ✓
Mixtral 8x22B
MoE (141B total, 39B active per token)
141 B282 GB ✗141 GB ✗71 GB ✗
Gemma 2 27B
dense
27 B54 GB ✗27 GB ✗14 GB ✓
Command R+
dense
104 B208 GB ✗104 GB ✗52 GB ✗
Kimi K2
MoE (1T total, 32B active per token)
1000 B2000 GB ✗1000 GB ✗500 GB ✗

Math: FP16 = params × 2 bytes; INT8 = params × 1 byte; INT4 = params × 0.5 bytes. MoE models sum every expert (full weights on disk), not the per-token active subset.

Common questions

Answer-first, sourced. Every claim below traces to a specific field on this page or a cited datasheet. FAQPage schema is emitted so LLM crawlers can lift these verbatim.

How much does NVIDIA A10 Tensor Core GPU cost?

NVIDIA A10 Tensor Core GPU launch pricing is not on record in the DEPLOY registry. Vendor list prices are typically published in the vendor's own briefing rather than the datasheet.

How much memory does NVIDIA A10 Tensor Core GPU have?

24 GB of GDDR6 at 600 GB/s. Vendor datasheet, first-party.

How much power does one NVIDIA A10 Tensor Core GPU draw?

150 W TDP (thermal design power) per chip. System-level draw is higher: see the reference-design section for rack-level kW.

Which open-weight LLMs fit on one NVIDIA A10 Tensor Core GPU?

Of the 13 public open-weight LLMs DEPLOY tracks: 2 fit at FP16, 2 at INT8, 4 at INT4 (weights only, excludes KV cache). The full table is above with per-model math. Sparsity, offloading and multi-GPU serving change the picture; this row is single-chip weights-only.

Key facts

Class
Compute SoC (AI accelerator)
Designer
NVIDIA
Safety-critical?
No (data-center inference / training)
Record as of
2026-08-25
Specifications (18 fields, click to expand)

Vendor datasheet figures (first-party). Dense throughput first; sparse (2:4) in parentheses where NVIDIA quotes it. The exhaustive spec sheet lives on the datasheet URL below the table: this row set covers what buyers actually compare on.

Process node
Samsung 8N
Transistors
28.3 B
Die size
628 mm²
CUDA cores
9,216
Tensor cores
288 (3rd gen (Ampere))
RT cores
72 (2nd gen)
TDP
150 W
Memory
24 GB GDDR6
Memory bandwidth
600 GB/s
PCIe
Gen 4 x16 (64 GB/s)
FP32
31.2 TFLOPS
TF32 (dense)
62.5 TFLOPS
FP16 (dense)
125 TFLOPS (250 sparse)
INT8 (dense)
250 TOPS (500 sparse)
INT4 (dense)
500 TOPS
Form factor
PCIe
Announced
2021-04-12
Released
2021-04-12

Source: vendor datasheet

Generation

Compare with

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Sources

Adoption rows appear as we verify chip-integration claims per model. Every row is a public claim the maker or a tier-1 source has stated; verification tier (verified / reported / inferred) is shown per row. See every chip on record for the full catalog or the NVIDIA record.