AI chip · NVIDIA
NVIDIA B200 (Blackwell)
Full-power Blackwell data-center GPU (~1000W TDP), 192 GB HBM3e. The core building block of the GB200 superchip.
On the DEPLOY graph: 3 campuses carry a cited inventory line for it · 1 reference-design cluster include it.
Market position
B200 is Blackwell's HGX-form-factor chip: 2.5x H100 dense FP8, 192 GB HBM3e, NVLink 5. Meta Prometheus, Microsoft Fairwater and CoreWeave started their Blackwell fleets here rather than jump straight to GB200 NVL72 rack-scale.
DEPLOY editorial. What the vendor PDF cannot tell you.
Physical-AI cross-link
Derived from claims already on record (vendor first-party TDP, throughput, price, and the reference-design cluster registry). The arithmetic is shown per row so it can be audited. No estimated inputs.
- Perf per watt
- 4.50 FP8 TFLOPS/W4,500 TFLOPS ÷ 1000 W = 4.50
- Rack power (in this design)
- 14.3 kW per NVIDIA HGX B200 (8-GPU baseboard) (~1788 W per chip incl. overhead)14.3 kW ÷ 8 chips = 1788 W each (system-level, includes CPU/mem/NIC/cooling)
- Cooling class (across reference designs)
- hybridObserved across 1 reference-design cluster containing this chip
What fits in 192 GB
Weights-only footprint for public open-weight LLMs. Pure arithmetic: params × bytes/param. Excludes KV cache and activation memory; add ~10-30% headroom for real serving. A model that does not fit at FP16 may still fit at INT8 or INT4 with quality trade-offs. Not a benchmark.
| Model | Params | FP16 | INT8 | INT4 |
|---|---|---|---|---|
| Llama 3.1 8B dense | 8 B | 16 GB ✓ | 8 GB ✓ | 4 GB ✓ |
| Llama 3.1 70B dense | 70 B | 140 GB ✓ | 70 GB ✓ | 35 GB ✓ |
| Llama 3.1 405B dense | 405 B | 810 GB ✗ | 405 GB ✗ | 203 GB ✗ |
| Llama 3.3 70B dense | 70 B | 140 GB ✓ | 70 GB ✓ | 35 GB ✓ |
| DeepSeek V3 MoE (671B total, 37B active per token) | 671 B | 1342 GB ✗ | 671 GB ✗ | 336 GB ✗ |
| DeepSeek R1 MoE (671B total, 37B active per token) | 671 B | 1342 GB ✗ | 671 GB ✗ | 336 GB ✗ |
| Qwen 2.5 7B dense | 7 B | 14 GB ✓ | 7 GB ✓ | 4 GB ✓ |
| Qwen 2.5 72B dense | 72 B | 144 GB ✓ | 72 GB ✓ | 36 GB ✓ |
| Mixtral 8x7B MoE (46.7B total, 12.9B active per token) | 46.7 B | 93 GB ✓ | 47 GB ✓ | 23 GB ✓ |
| Mixtral 8x22B MoE (141B total, 39B active per token) | 141 B | 282 GB ✗ | 141 GB ✓ | 71 GB ✓ |
| Gemma 2 27B dense | 27 B | 54 GB ✓ | 27 GB ✓ | 14 GB ✓ |
| Command R+ dense | 104 B | 208 GB ✗ | 104 GB ✓ | 52 GB ✓ |
| Kimi K2 MoE (1T total, 32B active per token) | 1000 B | 2000 GB ✗ | 1000 GB ✗ | 500 GB ✗ |
Math: FP16 = params × 2 bytes; INT8 = params × 1 byte; INT4 = params × 0.5 bytes. MoE models sum every expert (full weights on disk), not the per-token active subset.
Common questions
Answer-first, sourced. Every claim below traces to a specific field on this page or a cited datasheet. FAQPage schema is emitted so LLM crawlers can lift these verbatim.
How much does NVIDIA B200 (Blackwell) cost?
NVIDIA B200 (Blackwell) launch pricing is not on record in the DEPLOY registry. Vendor list prices are typically published in the vendor's own briefing rather than the datasheet.
How much memory does NVIDIA B200 (Blackwell) have?
192 GB of HBM3e at 8,000 GB/s. Vendor datasheet, first-party.
How much power does one NVIDIA B200 (Blackwell) draw?
1000 W TDP (thermal design power) per chip. System-level draw is higher: see the reference-design section for rack-level kW.
Which data centers have NVIDIA B200 (Blackwell)?
3 campuses on the DEPLOY registry carry a cited inventory line for this chip. Full list below with per-campus quantity hints where published.
Which open-weight LLMs fit on one NVIDIA B200 (Blackwell)?
Of the 13 public open-weight LLMs DEPLOY tracks: 7 fit at FP16, 9 at INT8, 9 at INT4 (weights only, excludes KV cache). The full table is above with per-model math. Sparsity, offloading and multi-GPU serving change the picture; this row is single-chip weights-only.
Key facts
- Class
- Compute SoC (AI accelerator)
- Designer
- NVIDIA
- Safety-critical?
- No (data-center inference / training)
- Record as of
- 2026-08-25
- Latest cited claim
- 2026-06-01 (across 7 inventory + benchmark rows)
Specifications (14 fields, click to expand)
Vendor datasheet figures (first-party). Dense throughput first; sparse (2:4) in parentheses where NVIDIA quotes it. The exhaustive spec sheet lives on the datasheet URL below the table: this row set covers what buyers actually compare on.
- Process node
- TSMC 4NP
- Transistors
- 208 B
- CUDA cores
- 33,792
- Tensor cores
- 1,056 (5th gen (Blackwell))
- TDP
- 1000 W
- Memory
- 192 GB HBM3e
- Memory bandwidth
- 8,000 GB/s
- PCIe
- Gen 5 x16 (1,800 GB/s)
- FP16 (dense)
- 2,250 TFLOPS (4,500 sparse)
- FP8 (dense)
- 4,500 TFLOPS (9,000 sparse)
- INT8 (dense)
- 4,500 TOPS (9,000 sparse)
- Form factor
- SXM6
- Announced
- 2024-03-18
- Released
- 2024-11-01
Source: vendor datasheet
Generation
Used in reference designs
The named rack-scale and pod-scale designs buyers actually order that contain this chip.
- ×8NVIDIA HGX B200 (8-GPU baseboard)platform
Compare with
Benchmarks
Published measurements per workload. Vendor datasheet numbers are first-party (verified posture); MLPerf / InferenceX / press results come in when their license terms + workload naming permit.
Data centers stocking NVIDIA B200 (Blackwell)
Who has the most? →Every campus on the DEPLOY registry with a public claim of NVIDIA B200 (Blackwell) on site. Quantity hints are unstructured because underlying disclosures vary by order of magnitude.
- xAI Colossus 2 Data Centeras of 2026-06-01partially energizedreported
Blackwell generation for Colossus 2 expansion
- Stargate Abileneas of 2026-03-01partially energizedreported
Nvidia Blackwell chips filling ~0.3 GW of energized capacity across 4 of 8 buildings; ramping toward 1.2 GW
- Stargate Doña Ana County / Project Jupiter (New Mexico)as of 2025-01-21under constructioninferred
Planned Blackwell capacity (Nvidia default for new Stargate builds; specific SKU pending disclosure)
Inferred from Stargate program's consistent Blackwell posture per OpenAI + Nvidia partnership; upgrade when G42/OpenAI confirms
Sources
- Blackwell architectureNvidia
Adoption rows appear as we verify chip-integration claims per model. Every row is a public claim the maker or a tier-1 source has stated; verification tier (verified / reported / inferred) is shown per row. See every chip on record for the full catalog or the NVIDIA record.